A 0.042-mm Fully Integrated Analog PLL with Stacked Capacitor-Inductor in 45nm CMOS
نویسندگان
چکیده
We present a fully integrated Phase Locked Loop in an advanced 45nm CMOS technology. The loop filter is integrated on chip under the voltage-controlled oscillator inductor, resulting in significant area savings. The whole PLL measures only 280um by 150um. The PLL has a dual-band output for 2-2.5GHz and 4-5GHz. The circuit operates from a 0.85V supply and consumes 15.3mW for a -120dBc/Hz phase noise at a 1MHz offset from a 2.0 to 2.5GHz carrier.
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